Apache Addresses Dynamic Power Integrity in STARC’s Latest Production Flow ...

PRESS RELEASE

Apache Addresses Dynamic Power Integrity in STARC’s Latest Production Flow

Apache’s Dynamic Power Closure Solution Provides Accuracy and Feedback to Timing

Mountain View, Calif. – January 23, 2006 – Apache Design Solutions, the technology leader in physical design integrity solutions for system-on-chip (SoC) designs, today announced that the Semiconductor Technology Academic Research Center (STARC) in Japan has implemented RedHawk, Apache’s full-chip dynamic power closure solutions in their latest production flow, STARCAD-21. During an extensive evaluation, RedHawk demonstrated accurate correlation results with Spice for both static IR-drop and dynamic voltage drop analysis. In addition, STARC has established a methodology for providing feedback to timing based on RedHawk’s power noise waveforms.

“As our customers go deeper into the nanometer realm, we need to support a power closure flow with a high degree of accuracy, fast turnaround time, and reduced design margins,” said Nobuyuki Nishiguchi, Vice President, General Manager Development Dept.-1 of STARC. “Apache’s RedHawk has proven to be the solution with accurate power results which we can use to provide feedback to timing for tighter design margin. It also delivers the capacity, performance and ease-of-use that is needed for large designs.”

“Over the past year, Apache and STARC have worked closely to deliver a power closure methodology for leading semiconductor companies in Japan,” said Andrew Yang, CEO of Apache. “We are pleased to see the addition of RedHawk in the STARC-21 production flow, and to be able to provide customers with access to the most accurate dynamic power integrity solution for ensured silicon success.”

About RedHawk

RedHawk is a full-chip Vectorless Dynamic™ physical power integrity solution for SoC power closure sign-off of 130nm, 90nm, and 65nm designs. Certified by TSMC’s 5.0 and 6.0 Reference Flow and correlated with silicon measurements and SPICE, RedHawk addresses dynamic power issues such as simultaneous switching output (SSO) for core, memory, clock, and I/O, as well as effects of on-chip inductance, package RLC, and decoupling capacitance. RedHawk delivers transistor-level accuracy with cell-based capacity, performance, and ease-of-use.

With RedHawk designers can identify dynamic “hot spots,” examine the impact on timing, accurately pinpoint the cause of dynamic voltage drop, and automatically repair the source of supply noise. RedHawk enables designers to reach power closure sign-off for high performance SoCs, including those utilizing advanced low-power design techniques such as leakage current control, MTCMOS (power-gating), multiple voltage domains, and multiple threshold transistors.

About Apache Design Solutions

Apache is a supplier of innovative next-generation silicon integrity platforms for low-power, high-performance system-on-a-chip (SoC) designs. By considering all sources of noise that impacts the design, such as power, signal, package / system IO, substrate, and temperature, Apache’s silicon integrity platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache’s vendor neutral platforms enable designers to adopt industry’s standard physical design flow for their toughest design challenges. Apache has direct sales and support offices worldwide with over 40 customers, including 7 of the top 10 semiconductor companies. For more information, visit www.apache-da.com.

Contacts

Apache Design Solutions
Yukari Chin, 650-641-4200
yukari@apache-da.com

Public Relations for Apache
Cayenne Communication
Michelle Clancy, 252-940-0981
michelle.clancy@cayennecom.com